Available (MSc and BSc) theses

last updated: 13/3/23

As a general rule, I supervise MSc and Bsc theses about either broad-scope research topics of interest for my research group, or focused research projects, possibly with industrial partners. I can also supervise (mainly BSc) theses on topics taught within my courses, unconnected to my research interests.

Broadly speaking, the research topics of my research group are:

Following you can find a list of subtopics. These change from time to time, so you are welcome to check again. Unless otherwise specified, both BSc and MSc theses are available for each subtopic. The scope of each thesis will obviously be adapted to the type of thesis (Bsc or MSc).

BSc theses need not be written in English.

Systems architectures

Quality of Service in predictable heterogeneous architectures

This research is carried out in collaboration with ARM (Cambrdige, UK).

This research project aims to design and evaluate techniques to achieve predictable performance (i.e., provide real-time guarantees) in upcoming heterogeneous architectures, using novel technologies such as ARM MPAM, and worst-case performance frameworks such as Deterministic Network Calculus.

References:

  1. Heterogeneous systems modelling with adaptive traffic profiles and its application to worst-case analysis of a DRAM controller
  2. The road towards predictable automotive high-performance platforms

Algorithmics of Network Calculus

Network Calculus is a mathematical framework for studying worst-case traversal times in multihop systems (e.g., packet networks, high-performance computing architectures) . The Nancy, open-source library, written in C#, allows one to run Network Calculus computations efficiently, with a syntax that matches the one of algebraic expressions.

Available topics for theses are:

References:

  1. Nancy: an efficient parallel Network Calculus library
  2. Computationally efficient worst-case analysis of flow-controlled networks with Network Calculus
  3. Extending the network calculus algorithmic toolbox for ultimately pseudo-periodic functions: Pseudo-inverse and composition

Processore sEP8, Verilog e ambiente relativo

(soltanto tesi triennali - BSc theses only)

Il processore didattico sEP8 visto a lezione è una buona base per sperimentare e approfondire l'implementazione di una architettura, sia studiando implementazioni alternative, o con maggior dettaglio, delle feature discusse a lezione, sia implementando feature discusse in corsi successivi a Reti Logiche. Tali studi passeranno sia per la simulazione tramite testbench, sia per la corretta esecuzione di software scritto per questa architettura. In ultimo, utilizzando la primitive di simulazione, è possibile progettare interfacce di ingresso e uscita, come tastiera e monitor, usabili per implementare software interattivo.

Mobile networks and Multi-access Edge Computing

MEC-based vehicular applications

Multi-access Edge Computing (MEC) will revolutionize the landscape of mobile application, by providing reliabe and ubiquitous computing power close to the edge of the network. This will allow one to run closed-loop control applications in real time, for instance cooperative, autonomous or teleoperated driving, robot coordination, etc.

The end-to-end performance of these services has not been sufficiently investigated yet. This is challenging, because they involve a number of potential sources of delay: onboard application, access (e.g., 5G) network, MEC computation, possibly MEC-based services.

Theses on this topic will have to propose creative solutions to problems like the above, and to evaluate them via simulation, using the open-source OMNeT++-based simulator Simu5G.

References:

  1. Simu5G – An OMNeT++ library for end-to-end performance evaluation of 5G networks
  2. Scalable Real-time Emulation of 5G Networks with Simu5G
  3. Rapid prototyping and performance evaluation of ETSI MEC-based applications

Network Digital Twins

A Digital Twin of a network can exploit simulation services for different purposes, e.g. what-if analysis, according to the "as-a-service" paradigm. This service can be instantiated on demand, possibly with constraints on the maximum simulation (wall clock) duration. Under such constraints, a simulator should be able to choose -- at run time -- the level of detail of the models that it runs, so as to produce the best possible results within the allocated time budget.

This can be done in several ways: running several (containerized) instances in parallel, and/or using multi-scale models of the same entity. Selection of the appropriate models should be performed based on performance profiling, possibly with the help of machine-learning algorithms.

This research will involve using and extending the open-source OMNeT++-based simulator Simu5G.

References:

  1. Using Network Simulators as Digital Twins
  2. Scalable Real-time Emulation of 5G Networks with Simu5G
  3. Rapid prototyping and performance evaluation of ETSI MEC-based applications

Next-generation avionic networks

This research is carried out in conjunction with Thales-Alenia Space Italia, in the framework of the "IRIS Global" project of the European Space Agency (ESA).

The safety of life of avionic communications hinges on airplanes being constantly connected to ground stations, even in case of failures of individual networks. This is why multilink communications, with dynamic switching among many available network technologies, is expected to be used in the future.

Theses on this topic will involve designing, implementing and evaluating multilink decision policies in an avionic context.

References:

  1. SAPIENT: enabling real-time monitoring and control in the Future Communication Infrastructure of Air Traffic Management
  2. SAPIENT-Simulator Modelling and Architecture